JAVA PROJECTS

CODE PROJECT NAME IEEE BASE PAPER
P4U-J02 A HYBRID CLOUD APPROACH FOR SECURE AUTHORIZED DEDUPLICATION 2018-19 REGISTER
P4U-J03 BUILDING CONFIDENTIAL AND EFFICIENT QUERY 2018-19 REGISTER
P4U-J04 CONSISTENCY AS A SERVICE 2018-19 REGISTER
P4U-J05 DECENTRALIZED ACCESS CONTROL WITH ANONYMOUS AUTHENTICATION OF DATA STORED IN CLOUDS 2018-19 REGISTER
P4U-J06 TOWARDS DIFFERENTIAL QUERY SERVICES IN 2018-19 REGISTER


EMBEDDED  PROJECTS

CODE PROJECT NAME IEEE BASE PAPER
P4U-E01 GPRS TERMINALS FOR READING FISCAL REGISTERS 2018-19 REGISTER
P4U-E02 ARM HARDWARE PLATFORM FOR VEHICULAR MONITORING AND TRACKING 2018-19 REGISTER
P4U-J04 CONSISTENCY AS A SERVICE 2018-19 REGISTER
P4U-E03 Wi Fi FOR VEHICULAR COMMUNICATION SYSTEMS 2018-19 REGISTER
P4U-E04 ACCESSIBLE DISPLAY DESIGN TO CONTROL HOME AREA NETWORKS 2018-19 REGISTER
P4U-E05 ONLINE MONITORING OF GEOLOGICAL CO2 STORAGE AND LEAKAGE BASED ON WIRELESS SENSOR NETWORKS 2018-19 REGISTER
P4U-E06 WIRELESS SYSTEM FOR MONITORING AND REAL-TIME CLASSIFICATION OF FUNCTIONAL ACTIVITY 2018-19 REGISTER
P4U-E07 SOFTWARE DESIGN IMPLEMENTATION OF SINGLE PIXEL CAMERA 2018-19 REGISTER
P4U-E08 DCT FEATURES BASED MALIGNANCY AND ABNORMALITY TYPE DETECTION METHOD FOR MAMMOGRAMS. 2018-19 REGISTER
P4U-E09 A NOVEL JOINT DATA-HIDING AND COMPRESSION SCHEME BASED ON SMVQ AND IMAGE INPAINTING. 2018-19 REGISTER
P4U-E010 THERMAL IMAGING AS A BIOMETRICS APPROACH TO FACIAL SIGNATURE AUTHENTICATION. 2018-19 REGISTER


VLSI  PROJECTS

REGISTER
CODE PROJECT NAME IEEE BASE PAPER
P4U-V01 FAST RADIX-10 MULTIPLICATION USING REDUNDANT BCD CODES 2018-19
P4U-V02 AN OPTIMIZED MODIFIED BOOTH RECODER FOR EFFICIENT DESIGN OF THE ADD-MULTIPLY OPERATOR 2018-19 REGISTER
P4U-V03 AREA-DELAY-POWER EFFICIENT FIXED-POINT LMS ADAPTIVE FILTER WITH LOW ADAPTATION-DELAY 2018-19 REGISTER
P4U-V04 ANALYSIS AND DESIGN OF A LOW-VOLTAGE LOW-POWER DOUBLE-TAIL COMPARATOR 2018-19 REGISTER
P4U-V05 LOW-COMPLEXITY LOW-LATENCY ARCHITECTURE FOR MATCHING OF DATA ENCODED WITH HARD SYSTEMATIC ERROR-CORRECTING CODES 2018-19 REGISTER
P4U-V06 MDC FFT/IFFT PROCESSOR WITH VARIABLE LENGTH FOR MIMO-OFDM SYSTEMS 2018-19 REGISTER
P4U-V07 DATA ENCODING TECHNIQUES FOR REDUCING ENERGY CONSUMPTION IN NETWORK-ON-CHIP 2018-19 REGISTER
P4U-V08 REVERSE CONVERTER DESIGN VIA PARALLEL-PREFIX ADDERS: NOVEL COMPONENTS, METHODOLOGY, AND IMPLEMENTATIONS 2018-19 REGISTER
P4U-V09 PARALLEL AES ENCRYPTION ENGINES FOR MANY-CORE PROCESSOR ARRAYS 2018-19 REGISTER
P4U-V010 MEASUREMENT AND EVALUATION OF POWER ANALYSIS ATTACKS ON ASYNCHRONOUS S-BOX 2018-19 REGISTER